Ranjan Ghosh

Sankhanil Dey, Ranjan Ghosh

Irreducible polynomials play an important role till now, in construction of 8-bit S-Boxes in ciphers. The 8-bit S-Box of Advanced Encryption Standard is a list of decimal equivalents of Multiplicative Inverses (MI) of all the elemental polynomials of a monic irreducible polynomial over Galois Field GF(2^8) [1]. In this paper a new method to search monic Irreducible Polynomials (IPs) over Galois fields GF(p^q) has been introduced. Here the decimal equivalents of each monic elemental polynomial (ep), two at a time, are split into the p-nary coefficients of each term, of those two monic elemental polynomials. From those coefficients the p-nary coefficients of the resultant monic basic polynomials (BP) have been obtained. The decimal equivalents of resultant basic polynomials with p-nary coefficients are treated as decimal equivalents of the monic reducible polynomials, since monic reducible polynomials must have two monic elemental polynomials as its factor. The decimal equivalents of polynomials belonging to the list of reducible polynomials are cancelled leaving behind the monic irreducible polynomials. A non-monic irreducible polynomial is computed by multiplying a monic irreducible polynomial by alpha where alpha belongs to GF(p^q) and assumes values from 2 to (p-1).

Rourab Paul, Hemanta Dey, Amlan Chakrabarti et al.

RC4 can be made more secured if an additional RC4-like Post-KSA Random Shuffing (PKRS) process is introduced between KSA and PRGA. It can also be made significantly faster if RC4 bytes are processed in a FPGA embedded system using multiple coprocessors functioning in parallel. The PKRS process is tuned to form as many S-boxes as required by particular design architectures involving multiple coprocessors, each one undertaking byte-by-byte processing. Following a ecent idea [1] [2] the speed of execution of each processor is also enhanced by another fold if the byte-by-byte processing is replaced by a scheme of processing two consecutive bytes together. Adopting some new innovative concepts, three hardware design architectures are proposed in a suitable FPGA embedded system involving 1, 2 and 4 coprocessors functioning in parallel and a study is made on accelerating RC4 by processing bytes in byte-by-byte mode achieving throughputs from 1-byte-in-1-clock to 4-bytes-in-1-clock. The hardware designs are appropriately upgraded to accelerate RC4 further by processing 2 onsecutive RC4 bytes together and it has been possible to achieve a maximum throughput of 8-bytes per clock in Xilinx Virtex-5 LX110t FPGA [3] architecture followed by secured data communication between two FPGA boards.

Chandrajit Pal, Amlan Chakrabarti, Ranjan Ghosh

Edge preserving filters preserve the edges and its information while blurring an image. In other words they are used to smooth an image, while reducing the edge blurring effects across the edge like halos, phantom etc. They are nonlinear in nature. Examples are bilateral filter, anisotropic diffusion filter, guided filter, trilateral filter etc. Hence these family of filters are very useful in reducing the noise in an image making it very demanding in computer vision and computational photography applications like denoising, video abstraction, demosaicing, optical-flow estimation, stereo matching, tone mapping, style transfer, relighting etc. This paper provides a concrete introduction to edge preserving filters starting from the heat diffusion equation in olden to recent eras, an overview of its numerous applications, as well as mathematical analysis, various efficient and optimized ways of implementation and their interrelationships, keeping focus on preserving the boundaries, spikes and canyons in presence of noise. Furthermore it provides a realistic notion for efficient implementation with a research scope for hardware realization for further acceleration.

J K M Sadique Uz Zaman, Ranjan Ghosh

A review study of NIST Statistical Test Suite is undertaken with a motivation to understand all its test algorithms and to write their C codes independently without looking at various sites mentioned in the NIST document. All the codes are tested with the test data given in the NIST document and excellent agreements have been found. The codes have been put together in a package executable in MS Windows platform. Based on the package, exhaustive test runs are executed on three PRNGs, e.g. LCG by Park & Miller, LCG by Knuth and BBSG. Our findings support the present belief that BBSG is a better PRNG than the other two.