70.7CCJun 1
Structure-Informed Multiple Sequence Alignment: A Formal Model and Hardness ResultsYoshiki Kanazawa, Naphan Benchasattabuse, Michal Hajdušek et al.
We formulate a structure-informed multiple sequence alignment problem, denoted MSA-S. The model abstracts biological sequences as strings and structural information as designated position-pairs. It augments a fixed pairwise string score, defined by a fixed non-gap symbol-pair scoring rule and fixed affine gap penalties, with a binary overlap score on designated position-pairs, which can be interpreted as a contact-map overlap score in structural applications. This yields a fixed-score, integer-valued optimization model suitable for complexity-theoretic analysis. Under this formulation, we show that the decision problem MSA-S-DEC is NP-complete for a broad class of fixed pairwise string scoring schemes. We also show that NP-hardness persists even under the restriction that every designated position-pair set is nonempty and the pair-overlap threshold is strictly positive. For the associated scalarized optimization problem MSA-S-OPT(lambda) with any fixed rational constant lambda >= 1, we further show that, under the canonical unit scheme for the non-gap symbol-pair scoring rule, MSA-S-OPT(lambda) admits no polynomial-time approximation scheme (PTAS) even for two input strings (k = 2), unless P = NP. These results establish a formal complexity-theoretic baseline for structure-informed multiple sequence alignment.
19.7QUANT-PHMay 5
Architecture and protocols for all-photonic quantum repeatersNaphan Benchasattabuse, Michal Hajdušek, Rodney Van Meter
The all-photonic quantum repeater scheme, utilizing a type of graph state called the repeater graph state (RGS), promises resilience to photon losses and operational errors, offering a fast Bell pair generation rate limited only by the RGS creation time (rather than enforced round-trip waits). While existing research has predominantly focused on RGS generation and secret key sharing rate analysis, there is a need to extend investigations to encompass broader applications, such as distributed computation and teleportation, the main tasks envisioned for the Quantum Internet. Here we propose a new emitter-photonic qubit building block and an RGS protocol that addresses several key considerations: end node involvement in connection establishment, decoding of logical qubits within the RGS, and computing the Pauli frame corrections at each participating node to ensure the desired correct end-to-end Bell pair state. Our proposed building block significantly reduces the total number of emissive quantum memories required for end nodes and seamlessly integrates all-photonic and memory-based repeaters under the same communication protocol. We also present an algorithm for decoding logical measurement results, employing graphical reasoning based on graph state manipulation rules.
QUANT-PHDec 14, 2021
QuISP: a Quantum Internet Simulation PackageRyosuke Satoh, Michal Hajdušek, Naphan Benchasattabuse et al.
We present an event-driven simulation package called QuISP for large-scale quantum networks built on top of the OMNeT++ discrete event simulation framework. Although the behavior of quantum networking devices have been revealed by recent research, it is still an open question how they will work in networks of a practical size. QuISP is designed to simulate large-scale quantum networks to investigate their behavior under realistic, noisy and heterogeneous configurations. The protocol architecture we propose enables studies of different choices for error management and other key decisions. Our confidence in the simulator is supported by comparing its output to analytic results for a small network. A key reason for simulation is to look for emergent behavior when large numbers of individually characterized devices are combined. QuISP can handle thousands of qubits in dozens of nodes on a laptop computer, preparing for full Quantum Internet simulation. This simulator promotes the development of protocols for larger and more complex quantum networks.
QUANT-PHDec 14, 2021
Simultaneous execution of quantum circuits on current and near-future NISQ systemsYasuhiro Ohkura, Takahiko Satoh, Rodney Van Meter
In the NISQ era, multi-programming of quantum circuits (QC) helps to improve the throughput of quantum computation. Although the crosstalk, which is a major source of noise on NISQ processors, may cause performance degradation of concurrent execution of multiple QCs, its characterization cost grows quadratically in processor size. To address these challenges, we introduce palloq (parallel allocation of QCs) for improving the performance of quantum multi-programming on NISQ processors while paying attention to the combination of QCs in parallel execution and their layout on the quantum processor, and reducing unwanted interference between QCs caused by crosstalk. We also propose a software-based crosstalk detection protocol that efficiently and successfully characterizes the hardware's suitability for multi-programming. We found a trade-off between the success rate and execution time of the multi-programming. This would be attractive not only to quantum computer service but also to users around the world who want to run algorithms of suitable scale on NISQ processors that have recently attracted great attention and are being enthusiastically investigated.
CRNov 11, 2021
The Present and Future of Discrete Logarithm Problems on Noisy Quantum ComputersYoshinori Aono, Sitong Liu, Tomoki Tanaka et al.
The discrete logarithm problem (DLP) is the basis for several cryptographic primitives. Since Shor's work, it has been known that the DLP can be solved by combining a polynomial-size quantum circuit and a polynomial-time classical post-processing algorithm. Evaluating and predicting the instance size that quantum devices can solve is an emerging research topic. In this paper, we propose a quantitative measure based on the success probability of the post-processing algorithm to determine whether an experiment on a quantum device (or a classical simulator) succeeded. We also propose a procedure to modify bit strings observed from a Shor circuit to increase the success probability of a lattice-based post-processing algorithm. We report preliminary experiments conducted on IBM-Quantum quantum computers and near-future predictions based on noisy-device simulations. We conducted our experiments with the ibm_kawasaki device and discovered that the simplest circuit (7 qubits) from a 2-bit DLP instance achieves a sufficiently high success probability to proclaim the experiment successful. Experiments on another circuit from a slightly harder 2-bit DLP instance, on the other hand, did not succeed, and we determined that reducing the noise level by half is required to achieve a successful experiment. Finally, we give a near-term prediction based on required noise levels to solve some selected small DLP and integer factoring instances.
QUANT-PHMar 26, 2019
Extracting Success from IBM's 20-Qubit Machines Using Error-Aware CompilationShin Nishio, Yulu Pan, Takahiko Satoh et al.
NISQ (Noisy, Intermediate-Scale Quantum) computing requires error mitigation to achieve meaningful computation. Our compilation tool development focuses on the fact that the error rates of individual qubits are not equal, with a goal of maximizing the success probability of real-world subroutines such as an adder circuit. We begin by establishing a metric for choosing among possible paths and circuit alternatives for executing gates between variables placed far apart within the processor, and test our approach on two IBM 20-qubit systems named Tokyo and Poughkeepsie. We find that a single-number metric describing the fidelity of individual gates is a useful but imperfect guide. Our compiler uses this subsystem and maps complete circuits onto the machine using a beam search-based heuristic that will scale as processor and program sizes grow. To evaluate the whole compilation process, we compiled and executed adder circuits, then calculated the KL-divergence (a measure of the distance between two probability distributions). For a circuit within the capabilities of the hardware, our compilation increases estimated success probability and reduces KL-divergence relative to an error-oblivious placement.