Xufeng He

Xufeng He

Rules-as-Code promises more testable legal obligations, but it also changes what regulated firms can learn. Existing work mostly emphasizes implementation gains; the strategic gap is whether machine-readable rules make boundary search cheaper. I study that gap with a synthetic agent-based reinforcement-learning simulation that separates actual conduct near a legal threshold from proximity in the computable enforcement signal. Across 150 seed-level scenario runs, 378 common-random-number computability-sweep runs, 288 Latin-hypercube global-design runs, and a 2,880,000-row firm-period panel, computable static rules raise conduct boundary mass relative to ambiguous static rules (0.411 versus 0.367) and raise signal boundary mass more sharply (0.403 versus 0.281). Ordinary adaptive updates lower consumer harm (0.202 to 0.194) but do not reliably reduce boundary search. A budget-neutral anti-gaming design reduces conduct boundary mass by 0.032 and consumer harm by 0.025 relative to computable static rules. These are mechanism-oriented synthetic results, not estimates of real firm behavior in a jurisdiction or industry. The contribution is an estimand distinction, an inspectable ABM/RL mechanism, and a reproducible artifact showing that transparent behavioral assumptions are sufficient to generate gaming-like boundary dynamics without implying that computable regulation is inherently undesirable.

Jiaqi Lv, Xufeng He, Yanchen Liu et al.

The rapid growth of deep learning has driven exponential increases in model parameters and computational demands. NVIDIA GPUs and their CUDA-based software ecosystem provide robust support for parallel computing, significantly alleviating computational bottlenecks. Meanwhile, due to the cultivation of user programming habits and the high performance of GPUs, the CUDA ecosystem has established a dominant position in the field of parallel software. This dominance requires other hardware platforms to support CUDA-based software with performance portability. However, translating CUDA code to other platforms poses significant challenges due to differences in parallel programming paradigms and hardware architectures. Existing approaches rely on language extensions, domain-specific languages (DSLs), or compilers but face limitations in workload coverage and generalizability. Moreover, these methods often incur substantial development costs. Recently, LLMs have demonstrated extraordinary potential in various vertical domains, especially in code-related tasks. However, the performance of existing LLMs in CUDA transpilation, particularly for high-performance code, remains suboptimal. To address these challenges, we propose a novel framework for generating high-performance CUDA and corresponding platform code pairs, leveraging AI compiler and automatic optimization technology. We further enhance the framework with a graph-based data augmentation method and introduce HPCTransEval, a benchmark for evaluating LLM performance on CUDA transpilation. We conduct experiments using CUDA-to-CPU transpilation as a case study on leading LLMs. The speedup ratio of the CPU operators has an average improvemnet of 43.8\%, highlighting the potential of LLMs to address compatibility challenges within the CUDA ecosystem. Our code is available at https://github.com/PJLAB-CHIP/HPCTransCompile.