Pratik Shrestha

Aavash Chhetri, Bibek Niroula, Pratik Shrestha et al.

Federated learning (FL) enables collaborative model training across decentralized medical institutions while preserving data privacy. However, medical FL benchmarks remain scarce, with existing efforts focusing mainly on unimodal or bimodal modalities and a limited range of medical tasks. This gap underscores the need for standardized evaluation to advance systematic understanding in medical MultiModal FL (MMFL). To this end, we introduce Med-MMFL, the first comprehensive MMFL benchmark for the medical domain, encompassing diverse modalities, tasks, and federation scenarios. Our benchmark evaluates six representative state-of-the-art FL algorithms, covering different aggregation strategies, loss formulations, and regularization techniques. It spans datasets with 2 to 4 modalities, comprising a total of 10 unique medical modalities, including text, pathology images, ECG, X-ray, radiology reports, and multiple MRI sequences. Experiments are conducted across naturally federated, synthetic IID, and synthetic non-IID settings to simulate real-world heterogeneity. We assess segmentation, classification, modality alignment (retrieval), and VQA tasks. To support reproducibility and fair comparison of future multimodal federated learning (MMFL) methods under realistic medical settings, we release the complete benchmark implementation, including data processing and partitioning pipelines, at https://github.com/bhattarailab/Med-MMFL-Benchmark .

Pratik Shrestha, Alec Aversa, Ioannis Savidis

The continuous scaling of CMOS technology has significantly increased the complexity of very large-scale integrated circuits, driving interest in applying machine learning (ML) to electronic design automation (EDA). However, the limited availability of open and standardized datasets limits interoperability, comparability, and reproducibility in ML-based research. This paper introduces EDA-Schema-V2, an open multimodal schema that provides a structured framework for representing and analyzing datasets in digital physical design. The schema includes representations of physical attributes and quality-of-results metrics across multiple stages of the design flow, including logic synthesis, floorplanning, placement, clock network synthesis, and routing. Utilizing the SkyWater 130nm, Nangate 45nm, IHP SG13G2 130nm, and ASAP 7nm open-source process design kits with the OpenROAD tool flow, datasets of physical circuit designs from the IWLS'05 benchmark suite are generated and analyzed. The dataset comprises 7,776 design instances spanning 18 benchmark circuits and includes stage-resolved representations from synthesis through detailed routing, generated through parameter sweeps over clock period, core utilization, and aspect ratio. The dataset contains over 275 million gates, 75 million nets, and more than 36 million extracted timing paths. In addition, twelve representative prediction tasks spanning timing, power, area, and routing metrics are identified, along with baseline analyses that characterize stage-to-stage predictability across the design flow. The resulting datasets and baselines are publicly released to support reproducible ML research and establish standardized benchmarks for evaluating ML-based approaches in digital physical design.

Zhengfeng Wu, Ziyi Chen, Nnaemeka Achebe et al.

This survey explores the integration of machine learning (ML) into EDA workflows for analog and RF circuits, addressing challenges unique to analog design, which include complex constraints, nonlinear design spaces, and high computational costs. State-of-the-art learning and optimization techniques are reviewed for circuit tasks such as constraint formulation, topology generation, device modeling, sizing, placement, and routing. The survey highlights the capability of ML to enhance automation, improve design quality, and reduce time-to-market while meeting the target specifications of an analog or RF circuit. Emerging trends and cross-cutting challenges, including robustness to variations and considerations of interconnect parasitics, are also discussed.

Pratik Shrestha, Saran Phatharodom, Alec Aversa et al.

Representation learning has become an effective technique utilized by electronic design automation (EDA) algorithms, which leverage the natural representation of workflow elements as images, grids, and graphs. By addressing challenges related to the increasing complexity of circuits and stringent power, performance, and area (PPA) requirements, representation learning facilitates the automatic extraction of meaningful features from complex data formats, including images, grids, and graphs. This paper examines the application of representation learning in EDA, covering foundational concepts and analyzing prior work and case studies on tasks that include timing prediction, routability analysis, and automated placement. Key techniques, including image-based methods, graph-based approaches, and hybrid multimodal solutions, are presented to illustrate the improvements provided in routing, timing, and parasitic prediction. The provided advancements demonstrate the potential of representation learning to enhance efficiency, accuracy, and scalability in current integrated circuit design flows.

Pratik Shrestha, Sujan Kapali, Swikar Gautam et al.

This paper introduces a mobile-based solution that enhances online shoe shopping through 3D modeling and Augmented Reality (AR), leveraging the efficiency of 3D Gaussian Splatting. Addressing the limitations of static 2D images, the framework generates realistic 3D shoe models from 2D images, achieving an average Peak Signal-to-Noise Ratio (PSNR) of 32, and enables immersive AR interactions via smartphones. A custom shoe segmentation dataset of 3120 images was created, with the best-performing segmentation model achieving an Intersection over Union (IoU) score of 0.95. This paper demonstrates the potential of 3D modeling and AR to revolutionize online shopping by offering realistic virtual interactions, with applicability across broader fashion categories.