Théo Cantaloube, Nicolai Fiege, Anastasia Volkova et al.
Efficient arithmetic circuit design for resourceconstrained hardware involves challenging combinatorial optimization problems, among which Multiple Constant Multiplication (MCM) is a prominent example. MCM aims at implementing multiplications by fixed integer constants using bit-shifts and additions/subtractions but optimal methods are typically limited to moderately-sized constants, e.g. 12 bits. For practical applications targeting larger precision, Very large Constant Multiplication (VLCM) is solved instead. Existing approaches typically address VLCM through a heuristic flow that decomposes large constants into patterns, applies MCM optimization techniques on moderately-sized targets, and reconstructs the final result. This paper proposes multiple improvements to this flow: new declarative optimization models for the pattern selection and for the reconstruction, as well as applying recent optimal MCM models. The cornerstones of the obtained improvements are (i) allowing the patterns to overlap, minimising the number of unique target constants for the MCM step and (ii) performing the reconstruction step optimally, instead of heuristically. In addition, we propose a globally-optimal VLCM approach and characterize its limits. We employ a mix of constraint programming and SAT to solve each step. Experimental results on synthetic and real-life signal processing and cryptographic benchmarks, with coefficient word lengths ranging from tens to thousands of bits, demonstrate that the proposed approach scales to very large precisions and consistently outperforms existing baselines.