Bifurcation Boundary Conditions for Switching DC-DC Converters Under Constant On-Time Control
For power electronics engineers designing DC-DC converters, this work provides improved design-oriented bifurcation boundaries that generalize previous results.
The paper derives more general and accurate boundary conditions for period-doubling and saddle-node bifurcations in switching DC-DC converters under constant on-time control, using sampled-data and harmonic balance analyses. The derived conditions are expressed in terms of signal slopes and harmonics, and are useful for designing converters to avoid these bifurcations.
Sampled-data analysis and harmonic balance analysis are applied to analyze switching DC-DC converters under constant on-time control. Design-oriented boundary conditions for the period-doubling bifurcation and the saddle-node bifurcation are derived. The required ramp slope to avoid the bifurcations and the assigned pole locations associated with the ramp are also derived. The derived boundary conditions are more general and accurate than those recently obtained. Those recently obtained boundary conditions become special cases under the general modeling approach presented in this paper. Different analyses give different perspectives on the system dynamics and complement each other. Under the sampled-data analysis, the boundary conditions are expressed in terms of signal slopes and the ramp slope. Under the harmonic balance analysis, the boundary conditions are expressed in terms of signal harmonics. The derived boundary conditions are useful for a designer to design a converter to avoid the occurrence of the period-doubling bifurcation and the saddle-node bifurcation.