A Multiplierless Pruned DCT-like Transformation for Image and Video Compression that Requires 10 Additions Only
This work addresses the need for efficient hardware implementations in image and video compression, though it is incremental as it builds on existing DCT approximations.
The authors tackled the problem of high computational cost in image and video compression by introducing a multiplierless pruned approximate 8-point DCT that requires only 10 additions, achieving competitive performance with state-of-the-art methods and a clock speed of 288 MHz in 45 nm CMOS technology.
A multiplierless pruned approximate 8-point discrete cosine transform (DCT) requiring only 10 additions is introduced. The proposed algorithm was assessed in image and video compression, showing competitive performance with state-of-the-art methods. Digital implementation in 45 nm CMOS technology up to place-and-route level indicates clock speed of 288 MHz at a 1.1 V supply. The 8x8 block rate is 36 MHz.The DCT approximation was embedded into HEVC reference software; resulting video frames, at up to 327 Hz for 8-bit RGB HEVC, presented negligible image degradation.