SMT-Based Bounded Model Checking of Fixed-Point Digital Controllers
This addresses reliability issues in digital controllers for embedded systems, but it is incremental as it applies an existing SMT-based method to a specific domain.
The paper tackles the problem of detecting design errors in digital controllers due to finite word-length implementation issues like overflows and limit cycles, using an SMT-based bounded model checker, and demonstrates its effectiveness in finding errors compared to traditional simulation tools in experiments with a ball and beam plant.
Digital controllers have several advantages with respect to their flexibility and design's simplicity. However, they are subject to problems that are not faced by analog controllers. In particular, these problems are related to the finite word-length implementation that might lead to overflows, limit cycles, and time constraints in fixed-point processors. This paper proposes a new method to detect design's errors in digital controllers using a state-of-the art bounded model checker based on satisfiability modulo theories. The experiments with digital controllers for a ball and beam plant demonstrate that the proposed method can be very effective in finding errors in digital controllers than other existing approaches based on traditional simulations tools.