Translating UML State Machines to Coloured Petri Nets Using Acceleo: A Report
This work addresses the need for automated formal verification in system design, but it is incremental as it builds on prior formalization efforts.
The authors tackled the problem of enabling formal verification for UML state machines by automating their translation to colored Petri nets using Acceleo, reporting that while Acceleo facilitated the process, it also presented limitations.
UML state machines are widely used to specify dynamic systems behaviours. However its semantics is described informally, thus preventing the application of model checking techniques that could guarantee the system safety. In a former work, we proposed a formalisation of non-concurrent UML state machines using coloured Petri nets, so as to allow for formal verification. In this paper, we report our experience to implement this translation in an automated manner using the model-to-text transformation tool Acceleo. Whereas Acceleo provides interesting features that facilitated our translation process, it also suffers from limitations uneasy to overcome.