A Single-Processor Approach to Speech Processing Pipeline of Bilateral Cochlear Implants
This addresses a critical deployment challenge for bilateral cochlear implant users, offering a practical solution with potential applications in hearing aids and speech enhancement, though it appears incremental in method.
The paper tackled the synchronization problem in bilateral cochlear implants by developing a single-processor speech processing pipeline that provides directionality and low computational requirements, showing effectiveness in six noise environments compared to multi-processor approaches.
This dissertation covers a single-processor approach to the speech processing pipeline of bilateral Cochlear Implants (CIs). The use of only a single processor to provide binaural stimulation signals overcomes the synchronization problem, which is an existing challenging problem in the deployment of bilateral CI devices. The developed single-processor speech processing pipeline provides CI users with a sense of directionality. Its non-synchronization feature as well as low computational and memory requirements make it a suitable solution for actual deployment. A speech enhancement framework is developed that incorporates different non-Euclidean speech distortion criteria and different noise environments. This framework not only allows the design of environment-optimized parameters but also enables a user-specific solution where the anthropometric measurements of an individual user are incorporated into the training process to obtain individualized bilateral parameters. The developed techniques are primarily meant for bilateral CIs, however, they are general purpose in the sense that they are also applicable to binaural hearing aids, bimodal devices having hearing aid in one ear and cochlear implant in the other ear as well as dual-channel speech enhancement applications. Extensive experiments have shown the effectiveness of the developed solution in six commonly encountered noise environments compared to a similar one-channel pipeline when using two separate processors or when using independent sequential processing.