A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ Learning
This work addresses the need for efficient hardware for neuromorphic systems, offering a domain-specific incremental improvement in neuron design for brain-inspired computing.
The paper tackled the challenge of creating a compact CMOS spiking neuron for brain-inspired computing chips by designing a leaky integrate-and-fire neuron that integrates current and drives resistive synapses, achieving an energy efficiency of 9.3 pJ/spike/synapse and the ability to drive a thousand synapses.
Nanoscale resistive memories are expected to fuel dense integration of electronic synapses for large-scale neuromorphic system. To realize such a brain-inspired computing chip, a compact CMOS spiking neuron that performs in-situ learning and computing while driving a large number of resistive synapses is desired. This work presents a novel leaky integrate-and-fire neuron design which implements the dual-mode operation of current integration and synaptic drive, with a single opamp and enables in-situ learning with crossbar resistive synapses. The proposed design was implemented in a 0.18 $μ$m CMOS technology. Measurements show neuron's ability to drive a thousand resistive synapses, and demonstrate an in-situ associative learning. The neuron circuit occupies a small area of 0.01 mm$^2$ and has an energy-efficiency of 9.3 pJ$/$spike$/$synapse.