DCCRFeb 18, 2016

RowHammer: Reliability Analysis and Security Implications

arXiv:1603.00747v120 citations
Originality Highly original
AI Analysis

This reveals a critical security threat in modern DRAM, allowing memory protection breaches through easily exploitable errors.

The paper exposed disturbance errors in commodity DRAM chips, showing that repeatedly accessing a DRAM row can corrupt data in adjacent rows, with 110 out of 129 tested modules from 2008-2014 exhibiting these errors.

As process technology scales down to smaller dimensions, DRAM chips become more vulnerable to disturbance, a phenomenon in which different DRAM cells interfere with each other's operation. For the first time in academic literature, our ISCA paper exposes the existence of disturbance errors in commodity DRAM chips that are sold and used today. We show that repeatedly reading from the same address could corrupt data in nearby addresses. More specifically: When a DRAM row is opened (i.e., activated) and closed (i.e., precharged) repeatedly (i.e., hammered), it can induce disturbance errors in adjacent DRAM rows. This failure mode is popularly called RowHammer. We tested 129 DRAM modules manufactured within the past six years (2008-2014) and found 110 of them to exhibit RowHammer disturbance errors, the earliest of which dates back to 2010. In particular, all modules from the past two years (2012-2013) were vulnerable, which implies that the errors are a recent phenomenon affecting more advanced generations of process technology. Importantly, disturbance errors pose an easily-exploitable security threat since they are a breach of memory protection, wherein accesses to one page (mapped to one row) modifies the data stored in another page (mapped to an adjacent row).

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