Real-Time Image Distortion Correction: Analysis and Evaluation of FPGA-Compatible Algorithms
This work addresses the need for deployable FPGA implementations of distortion correction for computer vision applications, but it appears incremental as it focuses on adapting existing techniques for hardware compatibility.
The paper tackled the problem of implementing real-time image distortion correction on FPGAs by introducing and analyzing hardware-compatible techniques, comparing them in terms of output quality using a geometric-error-based approach and estimating hardware resource requirements.
Image distortion correction is a critical pre-processing step for a variety of computer vision and image processing algorithms. Standard real-time software implementations are generally not suited for direct hardware porting, so appropriated versions need to be designed in order to obtain implementations deployable on FPGAs. In this paper, hardware-compatible techniques for image distortion correction are introduced and analyzed in details. The considered solutions are compared in terms of output quality by using a geometrical-error-based approach, with particular emphasis on robustness with respect to increasing lens distortion. The required amount of hardware resources is also estimated for each considered approach.