System level specification and verification using Concurrent State Machines and COSMA environment
This provides a formal verification method for concurrent systems like traffic controllers, but it is incremental as it applies existing CSM/COSMA tools to a benchmark case.
The authors tackled the problem of formally specifying and verifying a Traffic Light Controller system using Concurrent State Machines and the COSMA 2.0 environment, resulting in a verified model with hints for VHDL code generation.
Traffic Light Controller, a typical benchmark device, is specified and verified using of a formal model called Concurrent State Machines (CSM) and the software environment COSMA 2.0, which supports the system level specification and analysis of concurrent, asynchronous and communicating units. The TLC itself is a system of three concurrent components (the controller and two timers). The paper introduces briefly the CSM model and illustrates how system components are specified, how the reachability graph of a system is obtained and how the requirements are formally verified. Finally, the hints for the generation of VHDL code for the TLC are given.