Security Protection for Magnetic Tunnel Junction
This work addresses security vulnerabilities in MTJ-based computing systems for VLSI circuit designers, but it appears incremental as it builds on existing testing methods.
The paper tackles the problem of ensuring security in magnetic tunnel junction (MTJ) devices against malicious process variations by proposing a built-in-self-test architecture and an identification technique that detects abnormal behavior using circuit current signals, though no concrete performance numbers are provided.
Energy efficiency is one of the most important parameters for designing and building a computing system nowadays. Introduction of new transistor and memory technologies to the integrated circuits design have brought hope for low energy very large scale integration (VLSI) circuit design. This excellency is pleasant if the computing system is secure and the energy is not wasted through execution of malicious actions. In fact, it is required to make sure that the utilized transistor and memory devices function correctly and no error occurs in the system operation. In this regard, we propose a built-in-self-test architecture for security checking of the magnetic tunnel junction (MTJ) device under malicious process variations attack. Also, a general identification technique is presented to investigate the behaviour and activities of the employed circuitries within this MTJ testing architecture. The presented identification technique tries to find any abnormal behaviour using the circuit current signal.