Neuron inspired data encoding memristive multi-level memory cell
This work addresses a specific bottleneck in implementing analog signal processing for on-chip sensor backplanes, representing an incremental advancement in memristor-based memory technology.
The paper tackles the need for analog data encoding in memristive multi-level memory cells used in neuro-inspired hardware, presenting a design and analysis of a data encoder that generates control voltages for programming a 10-level memory system.
Mapping neuro-inspired algorithms to sensor backplanes of on-chip hardware require shifting the signal processing from digital to the analog domain, demanding memory technologies beyond conventional CMOS binary storage units. Using memristors for building analog data storage is one of the promising approaches amongst emerging non-volatile memory technologies. Recently, a memristive multi-level memory (MLM) cell for storing discrete analog values has been developed in which memory system is implemented combining memristors in voltage divider configuration. In given example, the memory cell of 3 sub-cells with a memristor in each was programmed to store ternary bits which overall achieved 10 and 27 discrete voltage levels. However, for further use of proposed memory cell in analog signal processing circuits data encoder is required to generate control voltages for programming memristors to store discrete analog values. In this paper, we present the design and performance analysis of data encoder that generates write pattern signals for 10 level memristive memory.