Energy-Efficient Inference Accelerator for Memory-Augmented Neural Networks on an FPGA
This work addresses energy-efficient inference for MANNs in question-answering tasks, which is incremental as it optimizes existing methods for specific hardware constraints.
The paper tackled the challenge of efficiently running memory-augmented neural networks (MANNs) on accelerators, particularly for mobile devices, by implementing an FPGA-based accelerator with inference thresholding, achieving energy efficiency up to 140 times higher than an NVIDIA TITAN V GPU on the bAbI dataset.
Memory-augmented neural networks (MANNs) are designed for question-answering tasks. It is difficult to run a MANN effectively on accelerators designed for other neural networks (NNs), in particular on mobile devices, because MANNs require recurrent data paths and various types of operations related to external memory access. We implement an accelerator for MANNs on a field-programmable gate array (FPGA) based on a data flow architecture. Inference times are also reduced by inference thresholding, which is a data-based maximum inner-product search specialized for natural language tasks. Measurements on the bAbI data show that the energy efficiency of the accelerator (FLOPS/kJ) was higher than that of an NVIDIA TITAN V GPU by a factor of about 125, increasing to 140 with inference thresholding