Raise Your Game for Split Manufacturing: Restoring the True Functionality Through BEOL
This addresses chip design security for hardware manufacturers, offering a novel defense against piracy with practical cost benefits.
The paper tackles the problem of intellectual property piracy in chip designs through split manufacturing by proposing a scheme that manipulates placement and routing to increase layout resilience, achieving 0% correct connection rates against state-of-the-art proximity attacks while maintaining controllable performance, power, and area overheads.
Split manufacturing (SM) seeks to protect against piracy of intellectual property (IP) in chip designs. Here we propose a scheme to manipulate both placement and routing in an intertwined manner, thereby increasing the resilience of SM layouts. Key stages of our scheme are to (partially) randomize a design, place and route the erroneous netlist, and restore the original design by re-routing the BEOL. Based on state-of-the-art proximity attacks, we demonstrate that our scheme notably excels over the prior art (i.e., 0% correct connection rates). Our scheme induces controllable PPA overheads and lowers commercial cost (the latter by splitting at higher layers).