High-Performance Parallel Implementation of Genetic Algorithm on FPGA
This work addresses the problem of slow genetic algorithm execution for researchers and engineers in optimization fields, but it is incremental as it applies an existing method (parallel implementation) to a new platform (FPGA).
The paper tackles the high computational time of genetic algorithms on sequential machines by proposing a parallel implementation on FPGA, achieving optimized processing time and area occupancy for various population sizes, with results analyzed for two-variable functions and potential for more variables.
Genetic Algorithms (GAs) are used to solve search and optimization problems in which an optimal solution can be found using an iterative process with probabilistic and non-deterministic transitions. However, depending on the problem's nature, the time required to find a solution can be high in sequential machines due to the computational complexity of genetic algorithms. This work proposes a parallel implementation of a genetic algorithm on field-programmable gate array (FPGA). Optimization of the system's processing time is the main goal of this project. Results associated with the processing time and area occupancy (on FPGA) for various population sizes are analyzed. Studies concerning the accuracy of the GA response for the optimization of two variables functions were also evaluated for the hardware implementation. However, the high-performance implementation proposes in this paper is able to work with more variable from some adjustments on hardware architecture.