Application-Specific System Processor for the SHA-1 Hash Algorithm
This work provides a domain-specific hardware solution for applications like password recovery and data integrity checking, but it is incremental as it applies an existing method to a specific algorithm.
The authors tackled the problem of accelerating the SHA-1 hash algorithm by designing an Application-Specific System Processor (ASSP) hardware implemented on an FPGA, achieving a throughput of 0.644 Gbps for a single instance and over 28 Gbps for 48 parallel instances.
This work proposes an Application-Specific System Processor (ASSP) hardware for the Secure Hash Algorithm 1 (SHA-1) algorithm. The proposed hardware was implemented in a Field Programmable Gate Array (FPGA) Xilinx Virtex 6 xc6vlx240t-1ff1156. The throughput and the occupied area were analyzed for several implementations in parallel instances of the hash algorithm. The results showed that the hardware proposed for the SHA-1 achieved a throughput of 0.644 Gbps for a single instance and slightly more than 28 Gbps for 48 instances in a single FPGA. Various applications such as password recovery, password validation, and high volume data integrity checking can be performed efficiently and quickly with an ASSP for SHA1.