New Family of Stream Ciphers as Physically Clone-Resistant VLSI-Structures
This addresses the need for secure, clone-resistant hardware identities in smart VLSI systems, offering a digital alternative to traditional analog PUFs, though it appears incremental by building on the SUC concept.
The paper tackles the problem of creating physically clone-resistant structures for hardware security by introducing a new family of 2^100 possible stream ciphers as keystream generators, achieving a linear complexity exceeding 2^81 and a period exceeding 2^161. It presents a Secret Unknown Cipher (SUC) concept for use in FPGA devices to serve as digital clone-resistant identities, with security analysis showing scalable levels even for post-quantum cryptography.
A new large class of $2^{100}$ possible stream ciphers as keystream generators KSGs, is presented. The sample cipher-structure-concept is based on randomly selecting a set of 16 maximum-period Nonlinear Feedback Shift Registers (NLFSRs). A non-linear combining function is merging the 16 selected sequences. All resulting stream ciphers with a total state-size of 223 bits are designed to result with the same security level and have a linear complexity exceeding $2^{81}$ and a period exceeding $2^{161}$. A Secret Unknown Cipher (SUC) is created randomly by selecting one cipher from that class of $2^{100}$ ciphers. SUC concept was presented recently as a physical security anchor to overcome the drawbacks of the traditional analog Physically Unclonable Functions (PUFs). Such unknown ciphers may be permanently self-created within System-on-Chip SoC non-volatile FPGA devices to serve as a digital clone-resistant structure. Moreover, a lightweight identification protocol is presented in open networks for physically identifying such SUC structures in FPGA-devices. The proposed new family may serve for lightweight realization of clone-resistant identities in future self-reconfiguring SoC non-volatile FPGAs. Such self-reconfiguring FPGAs are expected to be emerging in the near future smart VLSI systems. The security analysis and hardware complexities of the resulting clone-resistant structures are evaluated and shown to exhibit scalable security levels even for post-quantum cryptography.