OpenCL-based FPGA accelerator for disparity map generation with stereoscopic event cameras
This work addresses the problem of slow processing for event-based vision algorithms, offering a domain-specific solution that is incremental in nature.
The paper tackled the lack of hardware accelerators for event-based cameras by developing FPGA accelerators for a stereo matching algorithm to generate disparity maps, achieving a performance speedup of over 8x through simple code transformations.
Although event-based cameras are already commercially available. Vision algorithms based on them are still not common. As a consequence, there are few Hardware Accelerators for them. In this work we present some experiments to create FPGA accelerators for a well-known vision algorithm using event-based cameras. We present a stereo matching algorithm to create a stream of disparity events disparity map and implement several accelerators using the Intel FPGA OpenCL tool-chain. The results show that multiple designs can be easily tested and that a performance speedup of more than 8x can be achieved with simple code transformations.