An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things
This enables quantum-secure protocols for IoT devices, representing a significant hardware advancement rather than an incremental improvement.
The paper tackled the need for quantum-resistant security in IoT by presenting a configurable lattice cryptography processor, achieving two orders of magnitude energy savings over software and ~124k-gate area savings with a novel NTT architecture.
This paper presents a configurable lattice cryptography processor which enables quantum-resistant security protocols for IoT. Efficient sampling architectures, coupled with a low-power SHA-3 core, provide two orders of magnitude energy savings over software. A single-port RAM-based NTT architecture is proposed, which provides ~124k-gate area savings. This is the first ASIC implementation which demonstrates multiple lattice-based protocols proposed for NIST post-quantum standardization.