The resistance of an FPGA implementation of Grasshopper block cipher to CPA attacks
This work addresses side-channel attack vulnerabilities in cryptographic hardware for security applications, but it is incremental as it applies known countermeasures to a specific cipher.
The authors implemented the Grasshopper block cipher on FPGA and demonstrated that typical Correlation Power Analysis (CPA) attack models effective against AES-256 fail on Grasshopper implementations, showing resistance to such side-channel attacks.
In this paper, we implement the Russian standard block cipher Grasshopper on Field-Programmable Gate Array (FPGA). We also study the Correlation Power Analysis attack, which is a special type of side-channel attack proposed by Brier et al. To face this kind of attack, we propose a solution of software countermeasure, and we present the associated implementation of the Grasshopper algorithm. These two implementations are then compared to an AES-256 one. Finally, through the implementation of a CPA attack on an FPGA development board, we show that typical attack models that work on AES fail on Grasshopper implementations.