FPGA-based Binocular Image Feature Extraction and Matching System
This work addresses the need for high-speed, robust feature extraction and matching in embedded machine vision applications, representing an incremental improvement through hardware acceleration.
The paper tackled the computationally intensive task of image feature extraction and matching in machine vision by proposing an FPGA-based embedded system, achieving a processing rate of 640x480 @ 162fps for binocular video data with robustness to compression, blurring, and illumination.
Image feature extraction and matching is a fundamental but computation intensive task in machine vision. This paper proposes a novel FPGA-based embedded system to accelerate feature extraction and matching. It implements SURF feature point detection and BRIEF feature descriptor construction and matching. For binocular stereo vision, feature matching includes both tracking matching and stereo matching, which simultaneously provide feature point correspondences and parallax information. Our system is evaluated on a ZYNQ XC7Z045 FPGA. The result demonstrates that it can process binocular video data at a high frame rate (640$\times$480 @ 162fps). Moreover, an extensive test proves our system has robustness for image compression, blurring and illumination.