RED: A ReRAM-based Deconvolution Accelerator
This work addresses performance bottlenecks in deconvolution for neural networks like GANs and semantic segmentation, offering incremental improvements in hardware acceleration.
The paper tackles the inefficiency of performing deconvolution on existing ReRAM-based accelerators by proposing RED, a new accelerator design that integrates pixel-wise mapping and zero-skipping data flow, achieving speedups of 1.15x to 3.69x and energy reductions of 8% to 88.36% compared to state-of-the-art.
Deconvolution has been widespread in neural networks. For example, it is essential for performing unsupervised learning in generative adversarial networks or constructing fully convolutional networks for semantic segmentation. Resistive RAM (ReRAM)-based processing-in-memory architecture has been widely explored in accelerating convolutional computation and demonstrates good performance. Performing deconvolution on existing ReRAM-based accelerator designs, however, suffers from long latency and high energy consumption because deconvolutional computation includes not only convolution but also extra add-on operations. To realize the more efficient execution for deconvolution, we analyze its computation requirement and propose a ReRAM-based accelerator design, namely, RED. More specific, RED integrates two orthogonal methods, the pixel-wise mapping scheme for reducing redundancy caused by zero-inserting operations and the zero-skipping data flow for increasing the computation parallelism and therefore improving performance. Experimental evaluations show that compared to the state-of-the-art ReRAM-based accelerator, RED can speed up operation 3.69x~1.15x and reduce 8%~88.36% energy consumption.