A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing
This work addresses the need for efficient hardware implementations of cognitive computing, potentially enabling more scalable and energy-efficient AI systems, though it appears incremental as it builds on existing hyperdimensional representation concepts.
The authors tackled the problem of designing hardware-friendly cognitive systems by proposing a 'semi-holographic' representation system that avoids expensive multiplication, achieving energy efficiency below 6 pJ for 64-bit operands in performing superposition and binding operations.
One of the main, long-term objectives of artificial intelligence is the creation of thinking machines. To that end, substantial effort has been placed into designing cognitive systems; i.e. systems that can manipulate semantic-level information. A substantial part of that effort is oriented towards designing the mathematical machinery underlying cognition in a way that is very efficiently implementable in hardware. In this work we propose a 'semi-holographic' representation system that can be implemented in hardware using only multiplexing and addition operations, thus avoiding the need for expensive multiplication. The resulting architecture can be readily constructed by recycling standard microprocessor elements and is capable of performing two key mathematical operations frequently used in cognition, superposition and binding, within a budget of below 6 pJ for 64- bit operands. Our proposed 'cognitive processing unit' (CoPU) is intended as just one (albeit crucial) part of much larger cognitive systems where artificial neural networks of all kinds and associative memories work in concord to give rise to intelligence.