MemNet: Memory-Efficiency Guided Neural Architecture Search with Augment-Trim learning
This addresses memory constraints for mobile and embedded devices, offering an incremental improvement over existing efficient design methods.
The paper tackles the problem of high memory consumption in neural architecture search (NAS) for mobile and embedded devices by proposing MemNet, a framework that optimizes both performance and memory requirements. The result is an architecture that achieves competitive accuracy while saving an average of 24.17% on total memory compared to state-of-the-art methods.
Recent studies on automatic neural architectures search have demonstrated significant performance, competitive to or even better than hand-crafted neural architectures. However, most of the existing network architecture tend to use residual, parallel structures and concatenation block between shallow and deep features to construct a large network. This requires large amounts of memory for storing both weights and feature maps. This is challenging for mobile and embedded devices since they may not have enough memory to perform inference with the designed large network model. To close this gap, we propose MemNet, an augment-trim learning-based neural network search framework that optimizes not only performance but also memory requirement. Specifically, it employs memory consumption based ranking score which forces an upper bound on memory consumption for navigating the search process. Experiment results show that, as compared to the state-of-the-art efficient designing methods, MemNet can find an architecture which can achieve competitive accuracy and save an average of 24.17% on the total memory needed.