CROct 11, 2019

Hardware Security Evaluation of MAX 10 FPGA

arXiv:1910.05086v12 citations
Originality Synthesis-oriented
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This is an incremental feasibility study aimed at improving security for IoT devices using FPGAs.

The paper conducted a preliminary hardware security evaluation of Intel MAX 10 FPGAs, identifying their strong and weak security aspects and providing recommendations to counter vulnerabilities in real designs.

With the ubiquity of IoT devices there is a growing demand for confidentiality and integrity of data. Solutions based on reconfigurable logic (CPLD or FPGA) have certain advantages over ASIC and MCU/SoC alternatives. Programmable logic devices are ideal for both confidentiality and upgradability purposes. In this context the hardware security aspects of CPLD/FPGA devices are paramount. This paper shows preliminary evaluation of hardware security in Intel MAX 10 devices. These FPGAs are one of the most suitable candidates for applications demanding extensive features and high level of security. Their strong and week security aspects are revealed and some recommendations are suggested to counter possible security vulnerabilities in real designs. This is a feasibility study paper. Its purpose is to highlight the most vulnerable areas to attacks aimed at data extraction and reverse engineering. That way further investigations could be performed on specific areas of concern.

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