A Single-MOSFET MAC for Confidence and Resolution (CORE) Driven Machine Learning Classification
This work addresses power and area efficiency for mixed-signal classifiers in hardware, though it is incremental as it builds on existing mixed-signal approaches with specific improvements.
The paper tackles the problem of efficient machine-learning classification by proposing a high-confidence, high-resolution mixed-signal classifier that reduces power and area compared to state-of-the-art methods, achieving 90% accuracy, 6.2 pJ per classification (over 45 times lower energy), and 2,179 μm² area (over 7.3 times lower area).
Mixed-signal machine-learning classification has recently been demonstrated as an efficient alternative for classification with power expensive digital circuits. In this paper, a high-COnfidence high-REsolution (CORE) mixed-signal classifier is proposed for classifying high-dimensional input data into multi-class output space with less power and area than state-of-the-art classifiers. A high-resolution multiplication is facilitated within a single-MOSFET by feeding the features and feature weights into, respectively, the body and gate inputs. High-resolution classifier that considers the confidence of the individual predictors is designed at 45 nm technology node and operates at 100 MHz in subthreshold region. To evaluate the performance of the classifier, a reduced MNIST dataset is generated by downsampling the MNIST digit images from 28 $\times$ 28 features to 9 $\times$ 9 features. The system is simulated across a wide range of PVT variations, exhibiting nominal accuracy of 90%, energy consumption of 6.2 pJ per classification (over 45 times lower than state-of-the-art classifiers), area of 2,179 $μ$$m^{2}$ (over 7.3 times lower than state-of-the-art classifiers), and a stable response under PVT variations.