Scalable High Performance SDN Switch Architecture on FPGA for Core Networks
This addresses the problem of dynamic network traffic and service deployment delays in core networks for network operators, offering a hardware-based solution with incremental improvements in performance and efficiency.
The paper tackles the need for scalable and flexible networking infrastructure by presenting an FPGA-based switch fully compliant with OpenFlow, achieving a processing rate of 10Gbps and scaling up to 400Gbps while using only 60% of resources on a Xilinx Virtex-7 FPGA.
Due to the increasing heterogeneity in network user requirements, dynamically varying day to day network traffic patterns and delay in-network service deployment, there is a huge demand for scalability and flexibility in modern networking infrastructure, which in return has paved way for the introduction of Software Defined Networking (SDN) in core networks. In this paper, we present an FPGA-based switch that is fully compliant with OpenFlow; the pioneering protocol for southbound interface of SDN. The switch architecture is completely implemented on hardware. The design consists of an OpenFlow Southbound agent which can process OpenFlow packets at a rate of 10Gbps. The proposed architecture speed scales up to 400Gbps while it consumes only 60% of resources on a Xilinx Virtex-7 featuring XC7VX485T FPGA.