On the Estimation of Complex Circuits Functional Failure Rate by Machine Learning Techniques
This work addresses the need for efficient failure analysis in functional safety for circuit design, though it is incremental as it applies existing machine learning techniques to a specific domain problem.
The paper tackles the problem of estimating functional failure rates (Functional De-Rating) for sequential logic cells in circuits, which traditionally requires intensive fault-injection simulations, by proposing a machine learning approach that uses per-instance features and achieves accurate predictions, as validated through benchmarking with reference data.
De-Rating or Vulnerability Factors are a major feature of failure analysis efforts mandated by today's Functional Safety requirements. Determining the Functional De-Rating of sequential logic cells typically requires computationally intensive fault-injection simulation campaigns. In this paper a new approach is proposed which uses Machine Learning to estimate the Functional De-Rating of individual flip-flops and thus, optimising and enhancing fault injection efforts. Therefore, first, a set of per-instance features is described and extracted through an analysis approach combining static elements (cell properties, circuit structure, synthesis attributes) and dynamic elements (signal activity). Second, reference data is obtained through first-principles fault simulation approaches. Finally, one part of the reference dataset is used to train the Machine Learning algorithm and the remaining is used to validate and benchmark the accuracy of the trained tool. The intended goal is to obtain a trained model able to provide accurate per-instance Functional De-Rating data for the full list of circuit instances, an objective that is difficult to reach using classical methods. The presented methodology is accompanied by a practical example to determine the performance of various Machine Learning models for different training sizes.