Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture
This work addresses hardware efficiency for neuromorphic computing, but appears incremental as it builds on existing spintronic architectures.
The authors tackled the problem of unsupervised clustering in neuromorphic computing by proposing a hardware learning rule for spintronic devices, resulting in a method that leverages domain-wall magnetic tunnel junctions to train synapses without specifying concrete performance numbers.
We propose a hardware learning rule for unsupervised clustering within a novel spintronic computing architecture. The proposed approach leverages the three-terminal structure of domain-wall magnetic tunnel junction devices to establish a feedback loop that serves to train such devices when they are used as synapses in a neuromorphic computing architecture.