Run-time Mapping of Spiking Neural Networks to Neuromorphic Hardware
This addresses the challenge of dynamic, online learning SNN applications for neuromorphic computing, though it is incremental as it builds on existing partitioning methods.
The paper tackles the problem of efficiently mapping spiking neural networks (SNNs) to neuromorphic hardware at run-time, proposing a two-step methodology that reduces mapping time by an average 780x compared to a state-of-the-art design-time approach with only 6.25% lower solution quality.
In this paper, we propose a design methodology to partition and map the neurons and synapses of online learning SNN-based applications to neuromorphic architectures at {run-time}. Our design methodology operates in two steps -- step 1 is a layer-wise greedy approach to partition SNNs into clusters of neurons and synapses incorporating the constraints of the neuromorphic architecture, and step 2 is a hill-climbing optimization algorithm that minimizes the total spikes communicated between clusters, improving energy consumption on the shared interconnect of the architecture. We conduct experiments to evaluate the feasibility of our algorithm using synthetic and realistic SNN-based applications. We demonstrate that our algorithm reduces SNN mapping time by an average 780x compared to a state-of-the-art design-time based SNN partitioning approach with only 6.25\% lower solution quality.