Surrogate gradients for analog neuromorphic computing
This work addresses the problem of efficient training for low-energy spiking networks on analog neuromorphic hardware, which is incremental but sets new benchmarks for the field.
The paper tackles the challenge of training high-performing spiking neural networks on analog neuromorphic hardware by introducing a surrogate gradient learning framework, resulting in competitive performance on vision and speech benchmarks with inference rates up to 85 k frames/second and power consumption under 200 mW.
To rapidly process temporal information at a low metabolic cost, biological neurons integrate inputs as an analog sum but communicate with spikes, binary events in time. Analog neuromorphic hardware uses the same principles to emulate spiking neural networks with exceptional energy-efficiency. However, instantiating high-performing spiking networks on such hardware remains a significant challenge due to device mismatch and the lack of efficient training algorithms. Here, we introduce a general in-the-loop learning framework based on surrogate gradients that resolves these issues. Using the BrainScaleS-2 neuromorphic system, we show that learning self-corrects for device mismatch resulting in competitive spiking network performance on both vision and speech benchmarks. Our networks display sparse spiking activity with, on average, far less than one spike per hidden neuron and input, perform inference at rates of up to 85 k frames/second, and consume less than 200 mW. In summary, our work sets several new benchmarks for low-energy spiking network processing on analog neuromorphic hardware and paves the way for future on-chip learning algorithms.