Block-matching in FPGA
This work addresses the need for efficient real-time video denoising in specific hardware (FPGA-based cameras), but it is incremental as it focuses on implementing an existing algorithm component.
The paper tackled the problem of implementing block-matching for the BM3D image denoising algorithm on an FPGA to enable parallel computations, with the result being a solution aimed at facilitating real-time video denoising in FPGA-based video cameras like the AXIOM Beta.
Block-matching and 3D filtering (BM3D) is an image denoising algorithm that works in two similar steps. Both of these steps need to perform grouping by block-matching. We implement the block-matching in an FPGA, leveraging its ability to perform parallel computations. Our goal is to enable other researchers to use our solution in the future for real-time video denoising in video cameras that use FPGAs (such as the AXIOM Beta).