Learning Assisted Side Channel Delay Test for Detection of Recycled ICs
This addresses the security and reliability issue of IC counterfeiting for the semiconductor industry, but it is incremental as it builds on existing side-channel testing methods.
The paper tackles the problem of detecting recycled integrated circuits (ICs) by proposing a scheme based on delay side-channel testing, which uses features from the design flow and sample delays to build a neural network model, achieving classification of timing paths into vulnerable and non-vulnerable groups to identify recycled ICs without requiring a golden chip.
With the outsourcing of design flow, ensuring the security and trustworthiness of integrated circuits has become more challenging. Among the security threats, IC counterfeiting and recycled ICs have received a lot of attention due to their inferior quality, and in turn, their negative impact on the reliability and security of the underlying devices. Detecting recycled ICs is challenging due to the effect of process variations and process drift occurring during the chip fabrication. Moreover, relying on a golden chip as a basis for comparison is not always feasible. Accordingly, this paper presents a recycled IC detection scheme based on delay side-channel testing. The proposed method relies on the features extracted during the design flow and the sample delays extracted from the target chip to build a Neural Network model using which the target chip can be truly identified as new or recycled. The proposed method classifies the timing paths of the target chip into two groups based on their vulnerability to aging using the information collected from the design and detects the recycled ICs based on the deviation of the delay of these two sets from each other.