An SMT-Based Approach for Verifying Binarized Neural Networks
This work addresses safety and security issues in neural networks for software systems, but it is incremental as it builds on existing verification methods with specific optimizations.
The paper tackles the problem of verifying safety and security in Binarized Neural Networks (BNNs) by proposing an SMT-based technique that supports networks with both binarized and non-binarized components, achieving verification through optimizations and parallelization implemented in the Marabou framework.
Deep learning has emerged as an effective approach for creating modern software systems, with neural networks often surpassing hand-crafted systems. Unfortunately, neural networks are known to suffer from various safety and security issues. Formal verification is a promising avenue for tackling this difficulty, by formally certifying that networks are correct. We propose an SMT-based technique for verifying Binarized Neural Networks - a popular kind of neural network, where some weights have been binarized in order to render the neural network more memory and energy efficient, and quicker to evaluate. One novelty of our technique is that it allows the verification of neural networks that include both binarized and non-binarized components. Neural network verification is computationally very difficult, and so we propose here various optimizations, integrated into our SMT procedure as deduction steps, as well as an approach for parallelizing verification queries. We implement our technique as an extension to the Marabou framework, and use it to evaluate the approach on popular binarized neural network architectures.