Accelerated Charged Particle Tracking with Graph Neural Networks on FPGAs
This work addresses the problem of accelerating charged particle tracking for high-energy physics experiments, particularly for the CERN Large Hadron Collider, by leveraging FPGAs.
This paper explores FPGA implementations of graph neural networks for charged particle tracking, achieving significant speedup over CPU-based execution. This could enable their use in future computing workflows and the Level-1 trigger at CERN's Large Hadron Collider.
We develop and study FPGA implementations of algorithms for charged particle tracking based on graph neural networks. The two complementary FPGA designs are based on OpenCL, a framework for writing programs that execute across heterogeneous platforms, and hls4ml, a high-level-synthesis-based compiler for neural network to firmware conversion. We evaluate and compare the resource usage, latency, and tracking performance of our implementations based on a benchmark dataset. We find a considerable speedup over CPU-based execution is possible, potentially enabling such algorithms to be used effectively in future computing workflows and the FPGA-based Level-1 trigger at the CERN Large Hadron Collider.