A Custom 7nm CMOS Standard Cell Library for Implementing TNN-based Neuromorphic Processors
This work provides a highly energy-efficient hardware implementation solution for neuromorphic processors based on TNNs, beneficial for edge AI applications requiring low power and small form factor.
This paper presents a custom 7nm CMOS standard cell library with optimized macro extensions for implementing Temporal Neural Networks (TNNs). A TNN prototype for MNIST, comprising 13,750 neurons and 315,000 synapses, achieved a compact die area of 1.56mm2 and consumed only 1.69mW.
A set of highly-optimized custom macro extensions is developed for a 7nm CMOS cell library for implementing Temporal Neural Networks (TNNs) that can mimic brain-like sensory processing with extreme energy efficiency. A TNN prototype (13,750 neurons and 315,000 synapses) for MNIST requires only 1.56mm2 die area and consumes only 1.69mW.