Reliability-Aware Quantization for Anti-Aging NPUs
This addresses reliability and performance losses in NPUs due to aging, offering a domain-specific solution for hardware designers.
The paper tackles the problem of transistor aging degrading NPU reliability and performance by proposing a reliability-aware quantization technique that eliminates aging guardbands. The result is an average accuracy loss of only 3% over 10 years and a 23% performance improvement.
Transistor aging is one of the major concerns that challenges designers in advanced technologies. It profoundly degrades the reliability of circuits during its lifetime as it slows down transistors resulting in errors due to timing violations unless large guardbands are included, which leads to considerable performance losses. When it comes to Neural Processing Units (NPUs), where increasing the inference speed is the primary goal, such performance losses cannot be tolerated. In this work, we are the first to propose a reliability-aware quantization to eliminate aging effects in NPUs while completely removing guardbands. Our technique delivers a graceful inference accuracy degradation over time while compensating for the aging-induced delay increase of the NPU. Our evaluation, over ten state-of-the-art neural network architectures trained on the ImageNet dataset, demonstrates that for an entire lifetime of 10 years, the average accuracy loss is merely 3%. In the meantime, our technique achieves 23% higher performance due to the elimination of the aging guardband.