Memristive Stochastic Computing for Deep Learning Parameter Optimization
This work addresses the challenge of power and area efficiency for deep learning hardware, particularly in edge devices, though it is incremental as it builds on existing stochastic computing and memristor technologies.
The paper tackles the problem of high computational cost in deep learning parameter optimization by using memristive stochastic computing to reduce the size of Multiply and Accumulate units by 5 orders of magnitude, achieving this with a scalable architecture that occupies 1.55mm² and consumes 167μW without notable accuracy reduction in a character recognition task.
Stochastic Computing (SC) is a computing paradigm that allows for the low-cost and low-power computation of various arithmetic operations using stochastic bit streams and digital logic. In contrast to conventional representation schemes used within the binary domain, the sequence of bit streams in the stochastic domain is inconsequential, and computation is usually non-deterministic. In this brief, we exploit the stochasticity during switching of probabilistic Conductive Bridging RAM (CBRAM) devices to efficiently generate stochastic bit streams in order to perform Deep Learning (DL) parameter optimization, reducing the size of Multiply and Accumulate (MAC) units by 5 orders of magnitude. We demonstrate that in using a 40-nm Complementary Metal Oxide Semiconductor (CMOS) process our scalable architecture occupies 1.55mm$^2$ and consumes approximately 167$μ$W when optimizing parameters of a Convolutional Neural Network (CNN) while it is being trained for a character recognition task, observing no notable reduction in accuracy post-training.