High-Level Synthesis of Security Properties via Software-Level Abstractions
This work addresses security concerns for data-intensive applications in domains like data centers and edge devices, but it appears incremental as it applies existing software abstractions to HLS.
The paper tackled the problem of integrating security properties into hardware accelerators by using high-level synthesis (HLS) with software-level abstractions, specifically demonstrating dynamic information flow tracking to hide implementation details from designers.
High-level synthesis (HLS) is a key component for the hardware acceleration of applications, especially thanks to the diffusion of reconfigurable devices in many domains, from data centers to edge devices. HLS reduces development times by allowing designers to raise the abstraction level and use automated methods for hardware generation. Since security concerns are becoming more and more relevant for data-intensive applications, we investigate how to abstract security properties and use HLS for their integration with the accelerator functionality. We use the case of dynamic information flow tracking, showing how classic software-level abstractions can be efficiently used to hide implementation details to the designers.