An error-propagation spiking neural network compatible with neuromorphic processors
This work addresses the problem of enabling efficient on-chip learning for low-power neuromorphic hardware, representing an incremental step towards practical edge-computing systems.
The paper tackled the challenge of implementing on-chip learning in multi-layer spiking neural networks for neuromorphic processors by developing a spike-based method that approximates back-propagation with local weight updates, enabling training to distinguish spike-timing patterns with identical mean firing rates.
Spiking neural networks have shown great promise for the design of low-power sensory-processing and edge-computing hardware platforms. However, implementing on-chip learning algorithms on such architectures is still an open challenge, especially for multi-layer networks that rely on the back-propagation algorithm. In this paper, we present a spike-based learning method that approximates back-propagation using local weight update mechanisms and which is compatible with mixed-signal analog/digital neuromorphic circuits. We introduce a network architecture that enables synaptic weight update mechanisms to back-propagate error signals across layers and present a network that can be trained to distinguish between two spike-based patterns that have identical mean firing rates, but different spike-timings. This work represents a first step towards the design of ultra-low power mixed-signal neuromorphic processing systems with on-chip learning circuits that can be trained to recognize different spatio-temporal patterns of spiking activity (e.g. produced by event-based vision or auditory sensors).