The Backpropagation Algorithm Implemented on Spiking Neuromorphic Hardware
This work addresses the problem of neurophysiological plausibility and hardware efficiency for deep learning practitioners, offering a path to low-power, low-latency applications, though it is incremental as it adapts an existing algorithm to new hardware.
The authors tackled the challenge of implementing the backpropagation algorithm on neuromorphic hardware by developing a spiking version using synfire-gated dynamics on Intel's Loihi processor, achieving competitive accuracy on MNIST digit classification and an energy-delay product suitable for edge computing.
The capabilities of natural neural systems have inspired new generations of machine learning algorithms as well as neuromorphic very large-scale integrated (VLSI) circuits capable of fast, low-power information processing. However, it has been argued that most modern machine learning algorithms are not neurophysiologically plausible. In particular, the workhorse of modern deep learning, the backpropagation algorithm, has proven difficult to translate to neuromorphic hardware. In this study, we present a neuromorphic, spiking backpropagation algorithm based on synfire-gated dynamical information coordination and processing, implemented on Intel's Loihi neuromorphic research processor. We demonstrate a proof-of-principle three-layer circuit that learns to classify digits from the MNIST dataset. To our knowledge, this is the first work to show a Spiking Neural Network (SNN) implementation of the backpropagation algorithm that is fully on-chip, without a computer in the loop. It is competitive in accuracy with off-chip trained SNNs and achieves an energy-delay product suitable for edge computing. This implementation shows a path for using in-memory, massively parallel neuromorphic processors for low-power, low-latency implementation of modern deep learning applications.