BOiLS: Bayesian Optimisation for Logic Synthesis
This addresses the problem of automated logic synthesis for circuit designers, offering an incremental improvement over existing machine learning approaches by reducing sample complexity.
The paper tackles the challenge of optimizing circuit quality-of-results (QoR) in logic synthesis by proposing BOiLS, a Bayesian optimization algorithm that outperforms state-of-the-art methods in sample efficiency and QoR values on EPFL benchmarks.
Optimising the quality-of-results (QoR) of circuits during logic synthesis is a formidable challenge necessitating the exploration of exponentially sized search spaces. While expert-designed operations aid in uncovering effective sequences, the increase in complexity of logic circuits favours automated procedures. Inspired by the successes of machine learning, researchers adapted deep learning and reinforcement learning to logic synthesis applications. However successful, those techniques suffer from high sample complexities preventing widespread adoption. To enable efficient and scalable solutions, we propose BOiLS, the first algorithm adapting modern Bayesian optimisation to navigate the space of synthesis operations. BOiLS requires no human intervention and effectively trades-off exploration versus exploitation through novel Gaussian process kernels and trust-region constrained acquisitions. In a set of experiments on EPFL benchmarks, we demonstrate BOiLS's superior performance compared to state-of-the-art in terms of both sample efficiency and QoR values.