Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves
This work addresses security risks in cryptographic hardware for applications requiring robust protection, though it is incremental as it applies known attacks to new implementations.
The paper tackled the vulnerability of hardware accelerators for elliptic curve cryptography to side-channel attacks, achieving 100% key extraction accuracy despite countermeasures like complete addition formulas and operation sequence randomization.
In this paper we report on the results of selected horizontal SCA attacks against two open-source designs that implement hardware accelerators for elliptic curve cryptography. Both designs use the complete addition formula to make the point addition and point doubling operations indistinguishable. One of the designs uses in addition means to randomize the operation sequence as a countermeasure. We used the comparison to the mean and an automated SPA to attack both designs. Despite all these countermeasures, we were able to extract the keys processed with a correctness of 100%.