Demonstrating BrainScaleS-2 Inter-Chip Pulse-Communication using EXTOLL
This work addresses a scalability issue for researchers using neuromorphic hardware to model large neural networks, though it appears incremental as it builds on existing technology.
The paper tackled the problem of connecting neurons across chip boundaries in the BrainScaleS-2 neuromorphic computing system for larger neural networks by implementing inter-chip pulse-communication using EXTOLL networking technology, resulting in high bandwidth, low latency, and high message rates.
The BrainScaleS-2 (BSS-2) Neuromorphic Computing System currently consists of multiple single-chip setups, which are connected to a compute cluster via Gigabit-Ethernet network technology. This is convenient for small experiments, where the neural networks fit into a single chip. When modeling networks of larger size, neurons have to be connected across chip boundaries. We implement these connections for BSS-2 using the EXTOLL networking technology. This provides high bandwidths and low latencies, as well as high message rates. Here, we describe the targeted pulse-routing implementation and required extensions to the BSS-2 software stack. We as well demonstrate feed-forward pulse-routing on BSS-2 using a scaled-down version without temporal merging.