Deep Bidirectional Transformers for SoC Flow Specification Mining
This addresses the need for high-quality flow specifications to improve validation of SoC designs, which is a domain-specific problem in hardware design.
The paper tackles the problem of generating accurate system-level message flow specifications from complex SoC IP communication traces, using a deep bidirectional transformer with attention to overcome concurrency challenges, and shows promising flow reconstruction results in experiments on highly interleaved traces.
High-quality system-level message flow specifications can lead to comprehensive validation of system-on-chip (SoC) designs. We propose a disruptive method that utilizes an attention mechanism to produce accurate flow specifications from SoC IP communication traces. The proposed method can overcome the inherent complexity of SoC traces induced by the concurrency and parallelism of multicore designs that existing flow specification mining tools often find extremely challenging. Experiments on highly interleaved traces show promising flow reconstruction compared to several tools dedicated to the flow specification mining problem.