RL4ReAl: Reinforcement Learning for Register Allocation
This addresses the problem of automating compiler optimization for register allocation, which is incremental as it applies existing RL techniques to a specific domain.
The paper tackled automating register allocation by embedding a multi-agent reinforcement learning algorithm in LLVM, and the results matched or outperformed production-grade LLVM allocators on Intel x86 and ARM AArch64.
We aim to automate decades of research and experience in register allocation, leveraging machine learning. We tackle this problem by embedding a multi-agent reinforcement learning algorithm within LLVM, training it with the state of the art techniques. We formalize the constraints that precisely define the problem for a given instruction-set architecture, while ensuring that the generated code preserves semantic correctness. We also develop a gRPC based framework providing a modular and efficient compiler interface for training and inference. Our approach is architecture independent: we show experimental results targeting Intel x86 and ARM AArch64. Our results match or out-perform the heavily tuned, production-grade register allocators of LLVM.